1. Field of the Invention
The invention relates to a dielectric ceramic, and a laminated ceramic capacitor configured with the use of the dielectric ceramic, and more particularly, relates to an improvement for making the dielectric constant of a dielectric ceramic higher.
2. Description of the Related Art
One of effective means for satisfying the demands of reduction in size and increase in capacitance for laminated ceramic capacitors is making the dielectric ceramic layers included in laminated ceramic capacitors thinner.
However, thinner dielectric ceramic layers not only make it more difficult to ensure realizing the required electrical insulation properties, but causes the problem that the electric field strength per dielectric ceramic layer is increased which easily decrease the dielectric constant. Therefore, there is a demand for increasing the dielectric constant of the dielectric ceramic constituting the dielectric ceramic layers as much as possible in the laminated ceramic capacitors, in order to satisfy the needs of reduction in size and increase in capacitance.
A technique for increasing the dielectric constant of a dielectric ceramic containing a barium titanate as its main component is proposed in, for example, Japanese Patent Application Laid-Open No. 2002-201065 (Patent Document 1). The dielectric ceramic described in Patent Document 1 will be described with reference to FIG. 3 which schematically illustrates an enlarged conventional dielectric ceramic 21.
The dielectric ceramic 21 described in Patent Document 1 contains a barium titanate as its main component, and includes main phase grains 22 containing the main component, and a composite oxide containing a rare earth metal and Si is produced at a grain boundary (including a triple point) 23. This phase containing Si is a low dielectric constant phase. Further, such a low dielectric constant phase is thinly and widely distributed at the grain boundary 23 in the dielectric ceramic 21 described in Patent Document 1.
Assuming that the dielectric ceramic 21 is used for constituting the dielectric ceramic layers provided in the laminated ceramic capacitor, when a line in the lamination direction is drawn between internal electrodes, the main phase grains and grain boundaries are distributed, such as a main phase grain—a grain boundary—a main phase grain—a grain boundary—a main phase grain—a grain boundary—a main phase grain, etc., along this line, with several grain boundaries 23 interposed serially between the main phase grains 22. When this serially combined capacitance, the capacitance for the main phase grain 22, and the capacitance for the low dielectric constant phase containing Si distributed at the grain boundary 23 are respectively denoted by C, C1, and C2, the combined capacitance C is represented as follows.1/C=1/C1+1/C2+1/C1+1/C2+1/C1+1/C2+1/C1+ . . .
In this equation, the number of terms 1/C2 is increased when the low dielectric constant phase is thinly and widely distributed at the grain boundary 23, to increase the value of the term 1/C, thereby decreasing the combined capacitance C. Accordingly, the dielectric ceramic 21 as a whole described in Patent Document 1 has a deceased dielectric constant.
It is to be noted that when the dielectric ceramic 21 is subjected to grain growth to reduce the total number of main phase grains 22, the number of grain boundaries 23 through which the line described above passes is also reduced, allowing the decrease in dielectric constant to be suppressed. In this case, however, the laminated ceramic capacitor will encounter the problem that its temperature characteristic of capacitance is easily degraded.